Tutorials

Muhammad Shafique
Title Building Energy-Efficient and Robust Machine Learning Systems: Challenges, Design Trends, and Opportunities at the Hardware and Software Levels
Abstract

Gigantic rates of data production in the era of Big Data, Internet of Thing (IoT), and Smart Cyber Physical Systems (CPS) pose incessantly escalating demands for massive data processing, storage, and transmission while continuously interacting with the physical world under unpredictable, harsh, and energy-/power-constrained scenarios. Therefore, such systems need to support not only the high-performance capabilities at tight power/energy envelop, but also need to be intelligent/cognitive, self-learning, and robust. This has given rise to a new age of Machine Learning (and, in general Artificial Intelligence) at different levels of the computing stack, ranging from Edge and Fog to the Cloud. In particular, Deep Neural Networks (DNNs) have shown a tremendous improvement over the past 5-7 years to achieve a significantly high accuracy for a certain set of tasks, like image classification, object detection, and natural language processing. However, these DNN require highly complex computations, costing a huge amount of processing, memory, and energy budgets. To some extent, Moore’s Law help by packing more transistors in the chip. However, at the same time, every new generation of device technology faces new issues and challenges. Besides diverse reliability threats, a key issue is the sharp increase in power densities in on-chip systems according to the discontinuation of Dennard Scaling. These technological issues and the escalating challenges posed by the new generation of IoT and CPS systems force to rethink the computing foundations, architectures and the system software. As the process technology shrinks and the per-transistor performance/power efficiency is not keeping pace with the well-known power-reduction techniques (like Dynamic Voltage and Frequency Scaling, and Power Gating) at various abstraction layers, purely relying on the traditional low-power methods is most likely not sufficient to solve the rising energy-efficiency challenges. Moreover, in the era of growing cyber-security threats, the intelligent features of a smart CPS and IoT system face new type of attacks, requiring the need to explore Robust Machine Learning principles. At the CARE-Tech. group in the Vienna University of Technology (TU Wien) Austria, we are investigating the foundations for the next-generation energy-efficient and robust computing systems while addressing the above-mentioned challenges across the hardware and software stacks. In this tutorial, we will present different design challenges for building highly energy-efficient and robust machine learning systems, covering both the efficient software and hardware designs. After presenting a quick overview of state-of-the-art design trends, we will present the research roadmap and early results from our Brain-Inspired Computing (BrISC) project, ranging from approximate computing to neural processing with specialized machine learning hardware, covering both fundamental and technological challenges, which enable new opportunities for improving the area, power/energy, and performance efficiency of systems by orders of magnitude. Towards the end, we will provide a quick overview of different robustness aspects of the machine learning systems deployed in Smart CPS and IoT.

Bio

DMuhammad Shafique is a full professor (Univ.Prof.) of Computer Architecture and Robust Energy-Efficient Technologies (CARE-Tech.) at the Institute of Computer Engineering, Faculty of Informatics, Vienna University of Technology (TU Wien) since Nov. 2016. He received his Ph.D. in Computer Science from Karlsruhe Institute of Technology (KIT), Germany in Jan.2011. Afterwards, he established and led a highly recognized research group for several years as well as conducted impactful research and development activities in Pakistan. Besides co-founding a technology startup in Pakistan, he was also an initiator and team lead of an ICT R&D project. He has also established strong research ties with multiple universities in Pakistan, where he is actively co-supervising various R&D activities, resulting in top-quality research outcome and scientific publications. Before, he was with Streaming Networks Pvt. Ltd. (Islamabad office) where he was involved in research and development of video coding systems several years. Dr. Shafique has demonstrated success in leading team-projects, meeting deadlines for demonstrations, motivating team members to peak performance levels, and completion of independent challenging tasks. His experience is corroborated by strong technical knowledge and an educational record (throughout Gold Medalist). He also possesses an in-depth understanding of various video coding standards (HEVC, H.264, MVC, MPEG-1/2/4). His research interests are in computer architecture, power- & energy-efficient systems, robust computing, dependable & fault-tolerant system design, hardware security, emerging Brain-Inspired Computing trends like Neuromorphic and Approximate Computing, Hardware and System-level Design for Machine Learning and AI, emerging technologies & nanosystems, FPGAs, MPSoCs, and embedded systems. His research has a special focus on cross-layer analysis, modeling, design, and optimization of computing and memory systems covering various layers of the hardware and software stacks. The researched technologies and tools are deployed in application use cases from Internet-of-Things (IoT), Cyber-Physical Systems (CPS), and ICT for Development (ICT4D) domains. Dr. Shafique has given several Keynotes, Invited Talks, and Tutorials at premier venues. He has also organized many special sessions at premier venues (like DAC, ICCAD, DATE, and ESWeek) and served as the Guest Editor for IEEE Design and Test Magazine (D&T) and IEEE Transactions on Sustainable Computing (T-SUSC). He is the TPC Chair of ISVLSI 2020. He has served as the TPC co-Chair of ESTIMedia and LPDC, General Chair of ESTIMedia, Track Chair at DATE and FDL, and PhD Forum Chair of ISVLSI 2019. He has served on the program committees of numerous prestigious IEEE/ACM conferences including ICCAD, ISCA, DATE, CASES, ASPDAC, and FPL. He is a senior member of the IEEE and IEEE Signal Processing Society (SPS), and a member of the ACM, SIGARCH, SIGDA, SIGBED, and HIPEAC. He holds one US patent and has (co-)authored 6 Books, 10+ Book Chapters, and over 200 papers in premier journals and conferences. Dr. Shafique received the prestigious 2015 ACM/SIGDA Outstanding New Faculty Award (given world-wide to one person per year) for demonstrating an outstanding potential as a lead researcher and/or educator in the field of electronic design automation. Dr. Shafique also received six gold medals in his educational career, and several best paper awards and nominations at prestigious conferences like CODES+ISSS, DATE, DAC and ICCAD, Best Master Thesis Award, DAC'14 Designer Track Best Poster Award, IEEE Transactions of Computer "Feature Paper of the Month" Awards, and Best Lecturer Award. His research work on aging optimization for GPUs featured as a Research Highlight in the Nature Electronics, Feb.2018 issue.